On Fri, 30 May 2008, Benjamin Herrenschmidt wrote:
On Thu, 2008-05-29 at 10:47 -0400, Jes Sorensen wrote: Interesting. I've always been taught by ia64 people that mmiowb() was intended to be used solely between writel() and spin_unlock().
That's what I gathered too, based on what's written in memory-barriers.txt, which is the only kernel docs I could find that addressed this.
Yes, this has some cost (can be fairly significant on powerpc too) but I think it's a very basic assumption from drivers that consecutive writel's, especially issued by the same CPU, will get to the device in order.
It's also what memory-barriers.txt says they should do.
If this is a performance problem, then provide relaxed variants and use them in selected drivers.
I wrote a JTAG over gpio driver for the powerpc MPC8572DS platform. With the non-raw io accessors, the JTAG clock can run at almost ~9.5 MHz. Using raw versions (which I had to write since powerpc doesn't have any), the clock speed increases to about 28 MHz. So it can make a very significant different. -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
