You're right. (I think I've been staring at this too much today... :) Steve > -----Original Message----- > From: John Williams [mailto:john.williams@xxxxxxxxxxxxx] > Sent: Monday, May 05, 2008 5:26 PM > To: Stephen Neuendorffer > Cc: monstr@xxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; arnd@xxxxxxxx; linux-arch@xxxxxxxxxxxxxxx; John > Linn; matthew@xxxxxx; will.newton@xxxxxxxxx; drepper@xxxxxxxxxx; microblaze-uclinux@xxxxxxxxxxxxxx; > grant.likely@xxxxxxxxxxxx; Michal Simek > Subject: RE: [PATCH 07/56] microblaze_v2: Signal support > > On Mon, 2008-05-05 at 17:13 -0700, Stephen Neuendorffer wrote: > > I'm somewhat ignorant about what this code is attempting to do, but with > > some quick poking around (m68knommu, blackfin) seems to suggest that > > other architectures don't do this, while others (v850) have almost > > exactly the same code (although they are somewhat smarter and are > > careful not to flush the whole cache). > > > > At the very least, it seems like there is some work in this area needed. > > flush_cache_sigtramp should just invalidate 8 bytes up from the base > address of the trampoline. This is just the region on the process stack > where we insert a kind of call-back back. Writing the opcodes goes via > the dcache, and so there's a vanishingly small possibility that the CPU > will get a false hit on on an icache fetch when the code is executed. > > That was what Michal's patch had when I scanned it yesterday. It > certainly won't/shouldn't be invalidating the entire cache. > > Cheers, > > John > > -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
