From: Stanislav Spassov <stanspas@xxxxxxxxx>
This allows determining the maximum of any of the several delay values
stored in struct pci_dev.
Signed-off-by: Stanislav Spassov <stanspas@xxxxxxxxx>
---
drivers/pci/pci.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index ba54164652cc..e4840dbf2d1c 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4669,21 +4669,26 @@ bool pcie_wait_for_link(struct pci_dev *pdev, bool active)
}
/*
- * Find maximum D3cold delay required by all the devices on the bus. The
- * spec says 100 ms, but firmware can lower it and we allow drivers to
- * increase it as well.
+ * Find maximum delay required by all the devices on the bus after the
+ * given initialization event.
*
* Called with @pci_bus_sem locked for reading.
+ *
+ * XXX: It is not clear if this should descend down across bridges (if any)
*/
-static int pci_bus_max_d3cold_delay(const struct pci_bus *bus)
+static int pci_bus_max_delay(const struct pci_bus *bus,
+ enum pci_init_event event, int default_delay)
{
const struct pci_dev *pdev;
- int min_delay = 100;
+ int min_delay = default_delay;
int max_delay = 0;
int delay;
+ if (event >= PCI_INIT_EVENT_COUNT)
+ return default_delay;
+
list_for_each_entry(pdev, &bus->devices, bus_list) {
- delay = pdev->delay[PCI_INIT_EVENT_RESET];
+ delay = pdev->delay[event];
if (delay < min_delay)
min_delay = delay;
if (delay > max_delay)
@@ -4728,11 +4733,13 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, bool sx_resume)
return;
}
- /* Take d3cold_delay requirements into account */
+ /* Take delay requirements into account */
if (sx_resume && dev->ignore_reset_delay_on_sx_resume)
delay = 0;
else
- delay = pci_bus_max_d3cold_delay(dev->subordinate);
+ delay = pci_bus_max_delay(dev->subordinate,
+ PCI_INIT_EVENT_RESET,
+ PCI_RESET_DELAY);
if (!delay) {
up_read(&pci_bus_sem);
--
2.25.1
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