On 12/4/18 10:49 AM, Jerome Glisse wrote: >> Also, could you add a simple, example program for how someone might use >> this? I got lost in all the new sysfs and ioctl gunk. Can you >> characterize how this would work with the *exiting* NUMA interfaces that >> we have? > That is the issue i can not expose device memory as NUMA node as > device memory is not cache coherent on AMD and Intel platform today. > > More over in some case that memory is not visible at all by the CPU > which is not something you can express in the current NUMA node. Yeah, our NUMA mechanisms are for managing memory that the kernel itself manages in the "normal" allocator and supports a full feature set on. That has a bunch of implications, like that the memory is cache coherent and accessible from everywhere. The HMAT patches only comprehend this "normal" memory, which is why we're extending the existing /sys/devices/system/node infrastructure. This series has a much more aggressive goal, which is comprehending the connections of every memory-target to every memory-initiator, no matter who is managing the memory, who can access it, or what it can be used for. Theoretically, HMS could be used for everything that we're doing with /sys/devices/system/node, as long as it's tied back into the existing NUMA infrastructure _somehow_. Right?
