On 2016-08-26 05:08, Lorenzo Pieralisi wrote:
[ +Sinan ]
On Thu, Aug 25, 2016 at 07:59:17PM +0100, Marc Zyngier wrote:
[...]
> Thanks, Marc! It works, I tested on current X-Gene platforms that uses
> GICv2 and GICv2m.
>
> Will you commit this change? It will be a huge help as going with
> interrupt link will require firmware change.
Not for the time being. We now have an understanding of *why* things
do
not work, but Lorenzo seems to have a good grasp on what we can do to
address it correctly, and we should explore this first. If (and only
if)
there is a consensus that firmware already does all it should, then
I'll turn this hack into a proper series.
For the records, it is a discussion that already took place:
https://lkml.org/lkml/2016/3/14/923
As I have said there are already ARM64 systems with ACPI tables
out there using PCI interrupt links; I doubt that Qualcomm systems
allow to reconfigure the GIC interrupt pin allocated to legacy PCI
IRQs through interrupt links _SRS (hey it is *empty* :)),
therefore:
a) Some (the above is just an example from the mailing lists I am not
picking on anyone it is just for the sake of this discussion, I have
not dumped all ARM partners _PRT from their ACPI tables to check)
ACPI tables must be rewritten because they are not FW compliant
OR
b) We allow PCI interrupt links to be used for static interrupt
configurations
OR
c) We ignore the polarity flag (only for PCI legacy IRQs ? I wonder
how GIC code can detect from which part of the kernel the interrupt
request is coming, unless we implement an
ACPI-PCI-legacy-IRQ-special
gem)
Comments ?
Lorenzo
I complained about active low assumption before when reviewing the
series from Tomasz too. The above discussion took place when refactoring
the pci link code.
From Acpi spec perspective, both types of declarations are valid.
It is just one syntax doesn't work on arm64. The other syntax is more
expressive and it works. That is the reason why link objects are used in
QCOM platforms.
I think we need to fix the code by either changing the active low
assumption or the gic code.
Changing it at the gic level opens door for bugs that wouldn't be
otherwise caught. I would make this change in pci code.
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