I'll try to summarize the situation: We proposed two iterations of a patch that would parse HEST for a Corrected Machine Check entry and cause CMCI to be disabled if the Firmware First flag was found to be on in that entry. Several shortcomings of this approach were subsequently pointed out: a) Disabling CMCI doesn't go far enough. If the firmware wants to control corrected machine checks then we shouldn't even be polling the MCi_STATUS registers. Therefore we need to disable CMCI and disable polling if FF is set. b) The firmware may take over only a subset of the possible corrected machine check events. If we turn off CMCI (and polling) for all banks we may miss out on some types of errors. Therefore we should not indiscriminately disable CMCI on all banks. The question arose whether the APEI spec allows to specify individual machine check banks which fall under FF control. The answer appears to be 'possibly'. The Corrected Machine Check (CMC) structure defined in the APEI spec allows for a list of Machine Check Bank structures which could be used to designate a set of banks falling under FF control. However, the spec is silent on how the list of Machine Check Bank structures in the CMC structure is be used. Further steps in this endeavor may depend on the interpretation of the CMC structure in APEI an whether we can specify individual machine check banks that fall under FF control. - Max -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
