On 03/10/2024 13:40, Viresh Kumar wrote:
> On 29-09-24, 11:32, Jie Zhan wrote:
>> CPPC feedback counters can be unchanged or 0 when cores are idle, e.g.
>> clock-gated or power-gated. In such case, get the latest desired perf for
>> calculating frequency.
>>
>> Also, the HiSilicon CPPC workaround can now be removed as it can be handled
>> by the common code.
>>
>> ---
>> v4:
>> - Some additional comments as suggested. No functions changes.
>
> Merged with following diff to fix the warning.
>
> diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
> index ae3424cb3335..fd3e328a2d57 100644
> --- a/drivers/cpufreq/cppc_cpufreq.c
> +++ b/drivers/cpufreq/cppc_cpufreq.c
> @@ -38,13 +38,13 @@ static bool boost_supported;
>
> static struct cpufreq_driver cppc_cpufreq_driver;
>
> +#ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE
> static enum {
> FIE_UNSET = -1,
> FIE_ENABLED,
> FIE_DISABLED
> } fie_disabled = FIE_UNSET;
>
> -#ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE
> module_param(fie_disabled, int, 0444);
> MODULE_PARM_DESC(fie_disabled, "Disable Frequency Invariance Engine (FIE)");
>
Thanks for fixing the warning and merging!
Jie
