CPPC feedback counters can be unchanged or 0 when cores are idle, e.g. clock-gated or power-gated. In such case, get the latest desired perf for calculating frequency. Also, the HiSilicon CPPC workaround can now be removed as it can be handled by the common code. --- v4: - Some additional comments as suggested. No functions changes. v3: - Merge patch 1 & 2, tidy up the logic, and reduce duplicate code - Return 0 in cppc_perf_from_fbctrs() if the feedback counters are unchanged rather than return a cached desired perf - Return early in cppc_scale_freq_workfn() if the feedback counters are unchanged v2: - Try reading the lastest desired perf first before using the cached one - Do the same handling logic when feedback counters are unchanged - Remove hisilicon workaround Discussions: v1: https://lore.kernel.org/all/20240819035147.2239767-1-zhanjie9@xxxxxxxxxxxxx/ v2: https://lore.kernel.org/all/20240912072231.439332-1-zhanjie9@xxxxxxxxxxxxx/ v3: https://lore.kernel.org/all/20240919084552.3591400-1-zhanjie9@xxxxxxxxxxxxx/ Jie Zhan (2): cppc_cpufreq: Use desired perf if feedback ctrs are 0 or unchanged cppc_cpufreq: Remove HiSilicon CPPC workaround drivers/cpufreq/cppc_cpufreq.c | 128 ++++++++++++--------------------- 1 file changed, 46 insertions(+), 82 deletions(-) -- 2.33.0
