On Wed, 14 Jun 2023 10:32:40 +0200 Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote: > On Tue, Jun 13, 2023 at 09:35:23PM -0700, alison.schofield@xxxxxxxxx wrote: > > The CXL subsystem requires the creation of NUMA nodes for CFMWS > > The thing is CXL some persistent memory thing, right? But what is this > CFMWS thing? I don't think I've ever seen that particular combination of > letters together. > Hi Peter, To save time before the US based folk wake up. Both persistent and volatile memory found on CXL devices (mostly volatile on early devices). CXL Fixed Memory Window (structure) (CFMWS - defined in 9.17.1.3 of CXL r3.0 - via an ACPI table (CEDT). CFMWS, as a term, is sometimes abused in the kernel (and here) for the window rather than the structure describing the window (the S on the end). CFMWS - A region of Host Physical Address (HPA) Space which routes accesses to CXL Host bridges. A CFMWS describes interleaving as well (so multiple target host bridges). If multiple interleave setups are available, then you'll see multiple CFMWS entries - so different statically regions of HPA can route to same host bridges with different interleave setups (decoding via the configurable part to hit different actual memory on the downstream devices). Where accesses are routed after that depends on the configurable parts of the CXL topology (Host-Managed Device Memory (HDM) decoders in host bridges, switches etc). Note that a CFMWS address may route to nowhere if downstream devices aren't available / configured yet. CFMWS is the CXL specification avoiding defining interfaces for controlling the host address space to CXL host bridge mapping as those vary so much across host implementations + not always configurable at runtime anyway. Also includes a bunch of other details about the region (too many details perhaps!) Who does the configuration (BIOS / kernel) varies across implementations and we have OS managed hotplug so the OS always has to do some of it (personally I prefer the kernel doing everything :) It's made messier by CXL 1.1 hosts where a lot less was discoverable so generally the BIOS has to do the heavy lifting. For CXL 2.0 onwards the OS 'might' do everything except whatever is needed on the host to configure the CXL Fixed Memory Windows it is advertising. Note there is no requirement that the access characteristics of memory mapped into a given CFMWS should be remotely consistent across the whole window - some of the window may route through switches, and to directly connected devices. That's a simplifying assumption made today as we don't yet know the full scope of what people are building. Hope that helps (rather than causing confusion!) Jonathan
