On Fri, May 28, 2021 at 11:02:34AM -0500, Mario Limonciello wrote:
> The documentation around the StorageD3Enable property hints that it
> should be made on the PCI device. This is where newer AMD systems set
> the property and it's required for S0i3 support.
>
> So rather than look for nodes of the root port only present on Intel
> systems, switch to the companion ACPI device for all systems.
> David Box from Intel indicated this should work on Intel as well.
I think we need to wait for the confirmation from David. This looks good,
but I'd like to see testing. I also wonder how many of the simple suspend
quirks we can drop with this.
Shyjumon and Jon, can you retests the platforms quirked in
1fae37accfc5 ("nvme/pci: Add sleep quirk for Samsung and Toshiba drives")
with this fix?
