Re: [PATCH v2 3/3] KVM: PPC: Book3S: MMIO emulation support for little endian guests

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Am 09.10.2013 um 01:31 schrieb Paul Mackerras <paulus@xxxxxxxxx>:

> On Tue, Oct 08, 2013 at 04:25:31PM +0200, Alexander Graf wrote:
>> 
>> On 08.10.2013, at 16:12, Cédric Le Goater <clg@xxxxxxxxxx> wrote:
>> 
>>> MMIO emulation reads the last instruction executed by the guest
>>> and then emulates. If the guest is running in Little Endian mode,
>>> the instruction needs to be byte-swapped before being emulated.
>>> 
>>> This patch stores the last instruction in the endian order of the
>>> host, primarily doing a byte-swap if needed. The common code
>>> which fetches 'last_inst' uses a helper routine kvmppc_need_byteswap().
>>> and the exit paths for the Book3S PV and HR guests use their own
>>> version in assembly.
>>> 
>>> Finally, the meaning of the 'is_bigendian' argument of the
>>> routines kvmppc_handle_load() of kvmppc_handle_store() is
>>> slightly changed to represent an eventual reverse operation. This
>>> is used in conjunction with kvmppc_is_bigendian() to determine if
>>> the instruction being emulated should be byte-swapped.
>>> 
>>> Signed-off-by: Cédric Le Goater <clg@xxxxxxxxxx>
>>> ---
>>> 
>>> Changes in v2:
>>> 
>>> - replaced rldicl. by andi. to test the MSR_LE bit in the guest
>>>  exit paths. (Paul Mackerras)
>>> 
>>> - moved the byte swapping logic to kvmppc_handle_load() and 
>>>  kvmppc_handle_load() by changing the is_bigendian parameter
>>>  meaning. (Paul Mackerras)
>>> 
>>> arch/powerpc/include/asm/kvm_book3s.h   |    9 ++++++++-
>>> arch/powerpc/include/asm/kvm_ppc.h      |   10 +++++-----
>>> arch/powerpc/kvm/book3s_hv_rmhandlers.S |   11 +++++++++++
>>> arch/powerpc/kvm/book3s_segment.S       |   10 ++++++++++
>>> arch/powerpc/kvm/emulate.c              |    1 -
>>> arch/powerpc/kvm/powerpc.c              |   16 ++++++++++++----
>>> 6 files changed, 46 insertions(+), 11 deletions(-)
>>> 
>>> diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
>>> index 4ee6c66..f043e62 100644
>>> --- a/arch/powerpc/include/asm/kvm_book3s.h
>>> +++ b/arch/powerpc/include/asm/kvm_book3s.h
>>> @@ -289,7 +289,14 @@ static inline int kvmppc_ld32(struct kvm_vcpu *vcpu, ulong *eaddr,
>>> static inline int kvmppc_ld_inst(struct kvm_vcpu *vcpu, ulong *eaddr,
>>>                  u32 *inst)
>>> {
>>> -    return kvmppc_ld32(vcpu, eaddr, inst, false);
>>> +    int ret;
>>> +
>>> +    ret = kvmppc_ld32(vcpu, eaddr, inst, false);
>>> +
>>> +    if (kvmppc_need_byteswap(vcpu))
>>> +        *inst = swab32(*inst);
>> 
>> This logic wants to live in kvmppc_ld32(), no? Every 32bit access is going to need a byteswap, regardless of whether it's an instruction or not.
> 
> True, until we get to POWER8 with its split little-endian support,
> where instructions and data can have different endianness...

How exactly does that work?

Alex

> 
> Paul.
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