Re: What's the usage model (purpose) of interrupt remapping in IOMMU?

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On Wed, Aug 14, 2013 at 10:50 AM, Alex Williamson
<alex.williamson@xxxxxxxxxx> wrote:
> On Wed, 2013-08-14 at 10:37 +0800, Liu ping fan wrote:
>> On Wed, Nov 2, 2011 at 11:31 PM, Alex Williamson
>> <alex.williamson@xxxxxxxxxx> wrote:
>> > On Wed, 2011-11-02 at 13:26 +0800, Kai Huang wrote:
>> >> Hi,
>> >>
>> >> In case of direct io, without the interrupt remapping in IOMMU (intel
>> >> VT-d or AMD IOMMU), hypervisor needs to inject interrupt for guest
>> >> when the guest is scheduled to specific CPU. At the beginning I
>> >> thought with IOMMU's interrupt remapping, the hardware can directly
>> >> forward the interrupt to guest without trapping into hypervisor when
>> >> the interrupt happens, but after reading the Intel VT-d's manual, I
>> >> found the interrupt mapping feature just add another mapping which
>> >> allows software to control (mainly) the destination and vector, and we
>> >> still need hypervisor to inject the interrupt when the guest is
>> >> scheduled as only after the guest is scheduled, the target CPU can be
>> >> known. If my understanding is correct, seems the interrupt remapping
>> >> does not bring any performance improvement. So what's the benefit of
>> >> IOMMU's interrupt remapping? Can someone explain the usage model of
>> >> interrupt remapping in IOMMU?
>> >
>> > Interrupt remapping provides isolation and compatibility, not
>>
>> The guest can not directly program the msi-x on pci device, so msix is
>> still under the control of host. Why do we need extra control
>> introduced by iommu ?
>
> An MSI interrupt is just a DMA write with a specific address and
> payload.  Any device capable of DMA can theoretically inject an MSI
> interrupt using other means besides the MSI/MSI-X configuration areas.

Thank you for the clear explanation.

Thanks and regards,
Pingfan
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