Re: What's the usage model (purpose) of interrupt remapping in IOMMU?

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On Wed, Nov 2, 2011 at 11:31 PM, Alex Williamson
<alex.williamson@xxxxxxxxxx> wrote:
> On Wed, 2011-11-02 at 13:26 +0800, Kai Huang wrote:
>> Hi,
>>
>> In case of direct io, without the interrupt remapping in IOMMU (intel
>> VT-d or AMD IOMMU), hypervisor needs to inject interrupt for guest
>> when the guest is scheduled to specific CPU. At the beginning I
>> thought with IOMMU's interrupt remapping, the hardware can directly
>> forward the interrupt to guest without trapping into hypervisor when
>> the interrupt happens, but after reading the Intel VT-d's manual, I
>> found the interrupt mapping feature just add another mapping which
>> allows software to control (mainly) the destination and vector, and we
>> still need hypervisor to inject the interrupt when the guest is
>> scheduled as only after the guest is scheduled, the target CPU can be
>> known. If my understanding is correct, seems the interrupt remapping
>> does not bring any performance improvement. So what's the benefit of
>> IOMMU's interrupt remapping? Can someone explain the usage model of
>> interrupt remapping in IOMMU?
>
> Interrupt remapping provides isolation and compatibility, not

The guest can not directly program the msi-x on pci device, so msix is
still under the control of host. Why do we need extra control
introduced by iommu ?

Thanks,
Pingfan
> performance.  The hypervisor being able to direct interrupts to a target
> CPU also allows it the ability to filter interrupts and prevent the
> device from signaling spurious or malicious interrupts.  This is
> particularly important with message signaled interrupts since any device
> capable of DMA is able to inject random MSIs into the host.  The
> compatibility side is a feature of Intel platforms supporting x2apic.
> The interrupt remapper provides a translation layer to allow xapic aware
> hardware, such as ioapics, to function when the processors are switched
> to x2apic mode.  Thanks,
>
> Alex
>
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