On Tue, Mar 12, 2013 at 02:43:38PM +0100, Paolo Bonzini wrote:
> Il 12/03/2013 14:41, Gleb Natapov ha scritto:
> > Not sure I understand. I am saying the code should be:
> >
> > if (test_and_clear_bit(KVM_APIC_INIT, &apic->pending_events)) {
> > vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
> > kvm_lapic_reset(vcpu);
> > kvm_vcpu_reset(vcpu);
> > }
> > if (test_and_clear_bit(KVM_APIC_SIPI, &apic->pending_events) &&
> > vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
> > vcpu->arch.sipi_vector = apic->sipi_vector;
> > }
> >
>
> Yes, this is also discussed in the async_pf thread. But kvm_vcpu_reset
> is what sets CS based on the sipi_vector, so some more changes are
> needed (or you can just reset the VCPU twice, but that's ugly...).
>
Ah correct. We can start from reseting twice and documenting why are we
doing it. Then we should move sregs register initialization to common
code and factor out CS handling in separate function which will be
called on SIPI. Or just call kvm_set_segment() on SIPI.
--
Gleb.
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