Gleb Natapov wrote on 2013-01-10:
> On Thu, Jan 10, 2013 at 03:26:07PM +0800, Yang Zhang wrote:
>> +static void vmx_enable_virtual_x2apic_mode(struct kvm_vcpu *vcpu)
>> +{
>> + u32 exec_control;
>> + int msr;
>> + struct vcpu_vmx *vmx = to_vmx(vcpu);
>> +
>> + if (!cpu_has_vmx_virtualize_x2apic_mode())
>> + return;
>> +
>> + exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
>> + /* virtualize x2apic mode relies on tpr shadow */
>> + if (!(exec_control & CPU_BASED_TPR_SHADOW))
>> + return;
>> +
>> + exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
>> + exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
>> + exec_control |= SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
>> + vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
>> + vmx->virtual_x2apic_enabled = true;
>> +
>> + if (!cpu_has_vmx_virtual_intr_delivery())
>> + return;
>> +
>> + for (msr = 0x800; msr <= 0x8ff; msr++)
>> + vmx_intercept_for_msr_read(msr, false, false);
>> +
>> + /* APIC ID */
>> + vmx_intercept_for_msr_read(0x802, false, true);
> Why are you enabling apic id read intercept?
Current code to read apic id in x2apic mode has some hacks:
if (apic_x2apic_mode(apic))
val = kvm_apic_id(apic);
else
val = kvm_apic_id(apic) << 24;
static inline int kvm_apic_id(struct kvm_lapic *apic)
{
return (kvm_apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
}
According SPEC, in x2apic mode, the whole id reg is used, but in KVM, it only use the highest eight bits.
>> + /* TMCCT */
>> + vmx_intercept_for_msr_read(0x839, false, true);
>> + /* TPR */
>> + vmx_intercept_for_msr_write(0x808, false, false);
>> + /* EOI */
>> + vmx_intercept_for_msr_write(0x80b, false, false);
>> + /* SELF-IPI */
>> + vmx_intercept_for_msr_write(0x83f, false, false);
>> +
>> +}
>> +
>
> --
> Gleb.
Best regards,
Yang
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