On 07/23/2012 03:31 PM, Avi Kivity wrote: > On 07/23/2012 03:25 PM, Peter Maydell wrote: >> On 23 July 2012 13:18, Avi Kivity <avi@xxxxxxxxxx> wrote: >>> While you don't have an irqchip, you do have asynchronous interrupt >>> injection, yes? That's what irqchip really is all about. >> >> This seems an odd point of view -- async interrupt injection >> doesn't have anything to do with whether we're modelling >> the irqchip in the kernel or in QEMU, I thought... > > It does on x86. The relationship between the APIC and the core is > synchronous - the APIC presents the interrupt, the core grabs is when it > is ready (interrupt flag, etc.) and signals the APIC it has done so. > The APIC then clears the interrupt from the interrupt request register > and sets it in the interrupt status register. This sequence has to be > done while the vcpu is stopped, since we don't have access to the > interrupt flag otherwise. Again, this is just the local APIC. The IOAPIC (which is x86 equivalent to the GIC, IIUC) doesn't change this picture and could have been emulated in userspace even with async interrupts. As it happens local APIC emulation pulls in the IOAPIC and PIC. So my view is that ARM with and without kernel GIC are irqchip_in_kernel, since whatever is the local APIC in ARM is always emulated in the kernel. -- error compiling committee.c: too many arguments to function -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
