On Sun, May 6, 2012 at 8:11 AM, Xudong Hao <xudong.hao@xxxxxxxxxxxxxxx> wrote:
> LTR: Save Max snoop/no-snoop Latency Value in pci_save_pcie_state, and restore them in pci_restore_pcie_state.
>
> Signed-off-by: Xudong Hao <xudong.hao@xxxxxxxxx>
>
> ---
> drivers/pci/pci.c | 12 ++++++++++++
> 1 files changed, 12 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 111569c..c8573c3 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -875,6 +875,12 @@ static int pci_save_pcie_state(struct pci_dev *dev)
> pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
> if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
> pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
> + if (pci_ltr_supported(dev)) {
> + pci_read_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT,
> + &cap[i++]);
> + pci_read_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT,
> + &cap[i++]);
> + }
>
> return 0;
> }
> @@ -908,6 +914,12 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
> pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]);
> if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
> pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
> + if (pci_ltr_supported(dev)) {
> + pci_write_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT,
> + cap[i++]);
> + pci_write_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT,
> + cap[i++]);
> + }
> }
>
This doesn't make any sense to me. "pos" is the offset of the PCI
Express Capability (identifier 10h). LTR is a separate extended
capability (identifier 18h), so you at least have to look up its
offset.
Bjorn
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