On Tue, Oct 18, 2011 at 12:23:11PM -0400, Jan Kiszka wrote:
> AMD processors apparently have a bug in the hardware task switching
> support when NPT is enabled. If the task switch triggers a NPF, we can
> get wrong EXITINTINFO along with that fault. On resume, spurious
> exceptions may then be injected into the guest.
>
> We were able to reproduce this bug when our guest triggered #SS and the
> handler were supposed to run over a separate task with not yet touched
> stack pages.
>
> Work around the issue by continuing to emulate task switches even in
> NPT mode.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx>
Acked-by: Joerg Roedel <joerg.roedel@xxxxxxx>
> ---
> arch/x86/kvm/svm.c | 1 -
> 1 files changed, 0 insertions(+), 1 deletions(-)
>
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index e7ed4b1..e32243e 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -1084,7 +1084,6 @@ static void init_vmcb(struct vcpu_svm *svm)
> if (npt_enabled) {
> /* Setup VMCB for Nested Paging */
> control->nested_ctl = 1;
> - clr_intercept(svm, INTERCEPT_TASK_SWITCH);
> clr_intercept(svm, INTERCEPT_INVLPG);
> clr_exception_intercept(svm, PF_VECTOR);
> clr_cr_intercept(svm, INTERCEPT_CR3_READ);
> --
> 1.7.3.4
--
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