On Tue, Sep 13, 2011 at 09:58:38PM +0200, Andi Kleen wrote: > > Or are you saying an NMI in an idle system will have the same %rip thus > > falsely detecting a back-to-back NMI? > > Yup. Hmm. That sucks. Is there another register that can be used in conjunction to seperate it, like sp or something? Or we can we assume than an idle cpu isn't doing much for local NMI IPIs and that the only NMIs that would interrupt it would be external ones? > > Another problem is very long running instructions, like WBINVD and some others. > If there's a high frequency NMI it may well hit multiple times in a single > instance. I thought NMIs happen on instruction boundaries, maybe not. Honestly, our current implementation would probably be tripped up with those examples too, so I don't think I am making things worse (assuming the only high frequency NMI is coming from perf). Cheers, Don -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
