Avi Kivity <avi@xxxxxxxxxx> writes:
> On 04/24/2011 03:24 PM, Jan Kiszka wrote:
>> >
>> > This would cause IRQs to be delivered even if the PIT is masked, no?
>>
>> I checked the patch and our code again: NMI watchdog masking is managed
>> via arch.vapics_in_nmi_mode and by re-checking the per-APIC mask
>> situation in kvm_apic_local_deliver when delivering the NMI.
>>
>> So the patch looks correct - NMIs aren't acked like timer IRQs, the
>> current logic is definitely wrong.
>
> Can you elaborate? Why aren't NMIs acked (if delivered via the PIC)?
> Is the PIC programmed into auto-EOI mode or something?
This seems to be complex stuff depending on hardware configurations. I'm
not fully understanding though, current state of it is,
Yes, PIC is in AEOI mode if linux is using IO-APIC. Um.., kvm says
irq == 0 is mp_INT mode in MADT, not mp_ExtINT. So I guess system does
automatically INTA cycle (and AEOI because of PIC config), or not
connected via 8259A? (like in mpspec figure 5-2.)
To checking it, I've tested in check_timer() of linux on the physical
machine (irq==0 and mp_INT). The test is something like,
if (pin1 != -1) {
/*
* Ok, does IRQ0 through the IOAPIC work?
*/
unmask_IO_APIC_irq(0);
disable_8259_irq(0);
if (timer_irq_works()) {
even if I called disable_8259_irq(0), timer was still working via
IO-APIC.
Would this explain why?
Thanks.
--
OGAWA Hirofumi <hirofumi@xxxxxxxxxxxxxxxxxx>
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