On 13 February 2011 16:56, Anthony Liguori <anthony@xxxxxxxxxxxxx> wrote: > If we can move away from Bus abstraction and to a simpler interface > mechanism, then we can express peer relationships by just having bidirection > references. ÂIOW: > > -device cpus,northbridge=nb,id=cpus,count=16 -device i440fx,cpus=cpus > > I don't think modelling each CPU makes sense. ÂWe should probably just model > all cpus in a single device for the sake of simplicity. How would this work for systems with multiple CPUs which have different views of the world? (ie their memory maps differ so that eg some RAM is shared between them but some parts of the address space are different RAM for the two cores, some devices one core only, some devices shared between cores but the device can tell which core made an IO request) With a bus-style abstraction this is straightforward: each core has its own bus which is what defines its view of the world, some devices and RAM are wired up to both buses. I'm not sure how the bidirectional reference model would look for this? (Real world examples would be if we ever had any need to actually model any of the auxiliary cores in say an OMAP device, or the M3 in a versatile-express. Yes, most systems won't look that odd but it does come up, especially in testbench type designs, and our interface abstraction should be able to handle it.) -- PMM -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
