On Fri, Dec 03, 2010 at 05:38:06PM -0600, Anthony Liguori wrote: > On 12/03/2010 05:32 PM, Joerg Roedel wrote: >> On Fri, Dec 03, 2010 at 04:39:22PM -0600, Anthony Liguori wrote: >> >>> + if (yield_on_hlt) >>> + min |= CPU_BASED_HLT_EXITING; >>> >> This approach won't work out on AMD because in HLT the CPU may enter >> C1e. In C1e the local apic timer interupt is not delivered anymore and >> when this is the current timer in use the cpu may miss timer ticks or >> never comes out of HLT again. The guest has no chance to work around >> this as the Linux idle routine does. >> > > And this doesn't break old software on bare metal? Yes it does. In fact, this behavior is documented as Erratum 400 for AMD CPUs. Linux has a workaround for it for quite some time. You can have a look at the c1e_idle routine for details. C1e can also be disabled by the OS. But there are BIOSes which re-enable it in SMI. So there is the chance that it gets re-enabled whithout an vmexit. Joerg -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html