On 18/3/25 05:51, Pierrick Bouvier wrote:
This will affect zregs field for aarch32.
This field is used for MVE and SVE implementations. MVE implementation
is clipping index value to 0 or 1 for zregs[*].d[],
so we should not touch the rest of data in this case anyway.
We should describe why it is safe for migration.
I.e. vmstate_za depends on za_needed() -> SME, not included in 32-bit
cpus, etc.
Should we update target/arm/machine.c in this same patch, or a
preliminary one?
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@xxxxxxxxxx>
---
target/arm/cpu.h | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 27a0d4550f2..00f78d64bd8 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -169,11 +169,7 @@ typedef struct ARMGenericTimer {
* Align the data for use with TCG host vector operations.
*/
-#ifdef TARGET_AARCH64
-# define ARM_MAX_VQ 16
-#else
-# define ARM_MAX_VQ 1
-#endif
+#define ARM_MAX_VQ 16
typedef struct ARMVectorReg {
uint64_t d[2 * ARM_MAX_VQ] QEMU_ALIGNED(16);
