>>> /* >>> * Before returning from TDH.VP.ENTER, the TDX Module assigns: >>> * XCR0 to the TD’s user-mode feature bits of XFAM (bits 7:0, 9) >>> * IA32_XSS to the TD's supervisor-mode feature bits of XFAM (bits 8, 16:10) TILECFG state (bit 17) and TILEDATA state (bit 18) are also user state. Are they cleared unconditionally? >>> */ >>> #define TDX_XFAM_XCR0_MASK (GENMASK(7, 0) | BIT(9)) >>> #define TDX_XFAM_XSS_MASK (GENMASK(16, 10) | BIT(8)) >>> #define TDX_XFAM_MASK (TDX_XFAM_XCR0_MASK | TDX_XFAM_XSS_MASK)
