On Wed, Nov 06, 2024 at 08:32:19AM -0800, Sean Christopherson wrote: >On Wed, Nov 06, 2024, Rick P Edgecombe wrote: >> On Wed, 2024-11-06 at 09:45 +0800, Yang, Weijiang wrote: >> > > > Appreciated for your review and comments! >> > > It looks like this series is very close. Since this v10, there was some >> > > discussion on the FPU part that seemed settled: >> > > https://lore.kernel.org/lkml/1c2fd06e-2e97-4724-80ab-8695aa4334e7@xxxxxxxxx/ >> > >> > Hi, Rick, >> > I have an internal branch to hold a v11 candidate for this series, which >> > resolved Sean's comments >> > for this v10, waiting for someone to take over and continue the upstream work. >> > >> > > >> > > Then there was also some discussion on the synthetic MSR solution, which >> > > seemed >> > > prescriptive enough: >> > > https://lore.kernel.org/kvm/20240509075423.156858-1-weijiang.yang@xxxxxxxxx/ >> > > >> > > Weijiang, had you started a v2 on the synthetic MSR series? Where did you >> > > get to >> > > on incorporating the other small v10 feedback? >> > >> > Yes, Sean's review feedback for v1 is also included in my above v11 candidate. >> >> Nice, sounds like another version (which could be the last) is basically ready >> to go. Please let me know if it gets stuck for lack of someone to take it over. > >Or me, if Intel can't conjure up the resource. I have spent way, way too much >time and effort on CET virtualization to let it die on the vine :-) Just FYI, I will take it over; I plan to submit v11 after x86 fpu changes [*] are settled. [*]: https://lore.kernel.org/kvm/67c5a358-0e40-4b2f-b679-33dd0dfe73fb@xxxxxxxxx/
