On 30/10/2024 18:41, Shameerali Kolothum Thodi wrote: >> -----Original Message----- >> From: Joao Martins <joao.m.martins@xxxxxxxxxx> >> Sent: Wednesday, October 30, 2024 4:57 PM >> To: Shameerali Kolothum Thodi >> <shameerali.kolothum.thodi@xxxxxxxxxx>; Jason Gunthorpe >> <jgg@xxxxxxxxxx>; Zhangfei Gao <zhangfei.gao@xxxxxxxxxx> >> Cc: iommu@xxxxxxxxxxxxxxx; Kevin Tian <kevin.tian@xxxxxxxxx>; Lu Baolu >> <baolu.lu@xxxxxxxxxxxxxxx>; Yi Liu <yi.l.liu@xxxxxxxxx>; Yi Y Sun >> <yi.y.sun@xxxxxxxxx>; Nicolin Chen <nicolinc@xxxxxxxxxx>; Joerg Roedel >> <joro@xxxxxxxxxx>; Suravee Suthikulpanit >> <suravee.suthikulpanit@xxxxxxx>; Will Deacon <will@xxxxxxxxxx>; Robin >> Murphy <robin.murphy@xxxxxxx>; Zhenzhong Duan >> <zhenzhong.duan@xxxxxxxxx>; Alex Williamson >> <alex.williamson@xxxxxxxxxx>; kvm@xxxxxxxxxxxxxxx; Shameer Kolothum >> <shamiali2008@xxxxxxxxx>; Wangzhou (B) <wangzhou1@xxxxxxxxxxxxx> >> Subject: Re: [PATCH v6 00/18] IOMMUFD Dirty Tracking >> On 30/10/2024 15:57, Shameerali Kolothum Thodi wrote: >>>> On 30/10/2024 15:36, Jason Gunthorpe wrote: >>>>> On Wed, Oct 30, 2024 at 11:15:02PM +0800, Zhangfei Gao wrote: >>>> but unexpected set backs unrelated to work delay some of my plans for >>>> qemu 9.2. >>>> I expect to resume in few weeks. I can point you to a branch while I don't >>>> submit (provided soft-freeze is coming) >>> >>> Also, I think we need a mechanism for page fault handling in case Guest >> handles >>> the stage 1 plus dirty tracking for stage 1 as well. >>> >> >> I have emulation for x86 iommus to dirty tracking, but that is unrelated to >> L0 >> live migration -- It's more for testing in the lack of recent hardware. Even >> emulated page fault handling doesn't affect this unless you have to re- >> map/map >> new IOVA, which would also be covered in this series I think. >> >> Unless you are talking about physical IOPF that qemu may terminate, >> though we >> don't have such support in Qemu atm. > > Yeah I was referring to ARM SMMUv3 cases, where we need nested-smmuv3 > support for vfio-pci assignment. Another usecase we have is support SVA in > Guest, with hardware capable of physical IOPF. > > I will take a look at your series above and will see what else is required> to support ARM. Please CC if you plan to respin or have a latest branch. > Thanks for your efforts. Right, the series about works for emulated intel-iommu and I had some patches for virtio-iommu (which got simpler thanks to Eric's work on aw-bits). amd-iommu is easily added too (but it needs to work with guest non-passthrough mode first before we get there). The only thing you need to do in iommu emulation side is to expose IOMMU_ATTR_MAX_IOVA[0], and it should be all. For guests hw-nesting / iopf I don't think I see it affected considering the GPA space remains the same and we still have a parent pagetable to get the stage 2 A/D bits (like non nested case). [0] https://lore.kernel.org/qemu-devel/20230622214845.3980-11-joao.m.martins@xxxxxxxxxx/ Joao
