On 5/8/2024 10:13 PM, Sean Christopherson wrote: > On Wed, May 08, 2024, Dapeng Mi wrote: >> On 5/8/2024 12:36 PM, Mingwei Zhang wrote: >>> if (pmu->passthrough && pmu->nr_arch_gp_counters) >>> >>> Since mediated passthrough PMU requires PerfMon v4 in Intel (PerfMon >>> v2 in AMD), once it is enabled (pmu->passthrough = true), then global >>> ctrl _must_ exist phyiscally. Regardless of whether we expose it to >>> the guest VM, at reset time, we need to ensure enabling bits for GP >>> counters are set (behind the screen). This is critical for AMD, since >>> most of the guests are usually in (AMD) PerfMon v1 in which global >>> ctrl MSR is inaccessible, but does exist and is operating in HW. >>> >>> Yes, if we eliminate that requirement (pmu->passthrough -> Perfmon v4 >>> Intel / Perfmon v2 AMD), then this code will have to change. However, >> Yeah, that's what I'm worrying about. We ever discussed to support mediated >> vPMU on HW below perfmon v4. When someone implements this, he may not >> notice this place needs to be changed as well, this introduces a potential >> bug and we should avoid this. > Just add a WARN on the PMU version. I haven't thought much about whether or not > KVM should support mediated PMU for earlier hardware, but having a sanity check > on the assumptions of this code is reasonable even if we don't _plan_ on supporting > earlier hardware. I have no preference on whether supporting the old hardware (especially for Intel CPUs below v4 which has no GLOBAL_STATUS_SET MSR), but I think the key question is whether we want to totally drop the emulated vPMU after mediated passthrough vPMU becomes mature. If so, we may have to support the old platforms.
