If LINEAR ADDRESS MASKING (LAM) is supported, VM entry allows CR3.LAM_U48
(bit 62) and CR3.LAM_U57 (bit 61) to be set in CR3 field.
Change the test result expectations when setting CR3.LAM_U48 or CR3.LAM_U57
on vmlaunch tests when LAM is supported.
Signed-off-by: Binbin Wu <binbin.wu@xxxxxxxxxxxxxxx>
Reviewed-by: Chao Gao <chao.gao@xxxxxxxxx>
---
lib/x86/processor.h | 3 +++
x86/vmx_tests.c | 6 +++++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/lib/x86/processor.h b/lib/x86/processor.h
index 44f4fd1e..ca8665b3 100644
--- a/lib/x86/processor.h
+++ b/lib/x86/processor.h
@@ -68,6 +68,8 @@
#define X86_CR0_PG BIT(X86_CR0_PG_BIT)
#define X86_CR3_PCID_MASK GENMASK(11, 0)
+#define X86_CR3_LAM_U57_BIT (61)
+#define X86_CR3_LAM_U48_BIT (62)
#define X86_CR4_VME_BIT (0)
#define X86_CR4_VME BIT(X86_CR4_VME_BIT)
@@ -262,6 +264,7 @@ static inline bool is_intel(void)
#define X86_FEATURE_FLUSH_L1D (CPUID(0x7, 0, EDX, 28))
#define X86_FEATURE_ARCH_CAPABILITIES (CPUID(0x7, 0, EDX, 29))
#define X86_FEATURE_PKS (CPUID(0x7, 0, ECX, 31))
+#define X86_FEATURE_LAM (CPUID(0x7, 1, EAX, 26))
/*
* Extended Leafs, a.k.a. AMD defined
diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c
index c1540d39..63080361 100644
--- a/x86/vmx_tests.c
+++ b/x86/vmx_tests.c
@@ -7012,7 +7012,11 @@ static void test_host_ctl_regs(void)
cr3 = cr3_saved | (1ul << i);
vmcs_write(HOST_CR3, cr3);
report_prefix_pushf("HOST_CR3 %lx", cr3);
- test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
+ if (this_cpu_has(X86_FEATURE_LAM) &&
+ ((i == X86_CR3_LAM_U57_BIT) || (i == X86_CR3_LAM_U48_BIT)))
+ test_vmx_vmlaunch(0);
+ else
+ test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
report_prefix_pop();
}
--
2.25.1
