Intel CPUs, like Sapphire Rapids, introduces a new fixed counter (fixed counter 3) to counter/sample topdown.slots event, but current code still doesn't cover this new fixed counter. So this patch adds code to validate this new fixed counter can count slots event correctly. Signed-off-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx> --- x86/pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/x86/pmu.c b/x86/pmu.c index 6bd8f6d53f55..404dc7b62ac2 100644 --- a/x86/pmu.c +++ b/x86/pmu.c @@ -47,6 +47,7 @@ struct pmu_event { {"fixed 1", MSR_CORE_PERF_FIXED_CTR0, 10*N, 10.2*N}, {"fixed 2", MSR_CORE_PERF_FIXED_CTR0 + 1, 1*N, 500*N}, {"fixed 3", MSR_CORE_PERF_FIXED_CTR0 + 2, 0.1*N, 300*N}, + {"fixed 4", MSR_CORE_PERF_FIXED_CTR0 + 3, 1*N, 5000*N}, }; char *buf; -- 2.34.1