On Mon, Jun 26, 2023 at 11:40:28AM +0800, Yuan Yao wrote: > On Mon, Jun 26, 2023 at 08:08:20AM +0800, Yan Zhao wrote: > > On Sun, Jun 25, 2023 at 03:14:37PM +0800, Xiaoyao Li wrote: > > > On 6/20/2023 10:34 AM, Yan Zhao wrote: > > > > On Tue, Jun 20, 2023 at 10:42:57AM +0800, Chao Gao wrote: > > > > > On Fri, Jun 16, 2023 at 10:38:15AM +0800, Yan Zhao wrote: > > > > > > For KVM_X86_QUIRK_CD_NW_CLEARED, remove the ignore PAT bit in EPT memory > > > > > > types when cache is disabled and non-coherent DMA are present. > > > > > > > > > > > > With the quirk KVM_X86_QUIRK_CD_NW_CLEARED, WB + IPAT are returned as the > > > > > > EPT memory type when guest cache is disabled before this patch. > > > > > > Removing the IPAT bit in this patch will allow effective memory type to > > > > > > honor PAT values as well, which will make the effective memory type > > > > > Given guest sets CR0.CD, what's the point of honoring (guest) PAT? e.g., > > > > > which guests can benefit from this change? > > > > This patch is actually a preparation for later patch 10 to implement > > > > fine-grained zap. > > > > If when CR0.CD=1 the EPT type is WB + IPAT, and > > > > when CR0.CD=0 + mtrr enabled, EPT type is WB or UC or ..., which are > > > > without IPAT, then we have to always zap all EPT entries. > > > > > > > > Given removing the IPAT bit when CR0.CD=1 only makes the quirk > > > > KVM_X86_QUIRK_CD_NW_CLEARED more strict (meaning it could be WC/UC... if > > > > the guest PAT overwrites it), it's still acceptable. > > > > > > Per my understanding, the reason why KVM had KVM_X86_QUIRK_CD_NW_CLEARED is > > > to ensure the memory type is WB to achieve better boot performance for old > > > OVMF. > > It works well for OVMF c9e5618f84b0cb54a9ac2d7604f7b7e7859b45a7, > > which is Apr 14 2015. > > > > > > > you need to justify the original purpose is not broken by this patch. > > > > Hmm, to dig into the history, the reason for this quirk is explained below: > > > > commit fb279950ba02e3210a16b11ecfa8871f3ee0ca49 > > Author: Xiao Guangrong <guangrong.xiao@xxxxxxxxx> > > Date: Thu Jul 16 03:25:56 2015 +0800 > > > > KVM: vmx: obey KVM_QUIRK_CD_NW_CLEARED > > > > OVMF depends on WB to boot fast, because it only clears caches after > > it has set up MTRRs---which is too late. > > > > Let's do writeback if CR0.CD is set to make it happy, similar to what > > SVM is already doing. > > > > > > which means WB is only a must for fast boot before OVMF has set up MTRRs. > > At that period, PAT is default to WB. > > > > After OVMF setting up MTRR, according to the definition of no-fill cache > > mode, "Strict memory ordering is not enforced unless the MTRRs are > > disabled and/or all memory is referenced as uncached", it's valid to > > honor PAT in no-fill cache mode. > > Does it also mean that, the honor PAT in such no-fill cache mode should > also happen for non-quirk case ? e.g. the effective memory type can be > WC if EPT is UC + guest PAT is WC for CD=1. No. Only the quirk KVM_X86_QUIRK_CD_NW_CLEARED indicates no-fill cache mode (CD=1 and NW=0). Without the quirk, UC + IPAT is desired. > > > Besides, if the guest explicitly claim UC via PAT, why should KVM return > > WB? > > In other words, if it's still slow caused by a UC value in guest PAT, > > it's desired to be fixed in guest instead of a workaround in KVM. > > the quirk may not work after this patch if the guest PAT is > stronger than WB for CD=1, we don't if any guest "works correctly" based > on this quirk, I hope no. How about highlight this in commit message At least for Seabios and OVMF, the PAT is WB by default. Even after MTRRs enabled, if there are UC ranges, they are small in size and are desired to be UC. So, I think it's ok. > explicitly ? Will try to explain the background and possible influence. Thanks > > Also I agree that such issue should be fixed in guest not in KVM. >
