From: Like Xu <likexu@xxxxxxxxxxx> Return #GP if KVM user space attempts to set a reserved bit for guest. If the user space sets reserved bits when restoring the MSR_CORE_ PERF_GLOBAL_STATUS register, these bits will be accidentally returned when the guest runs a read access to this register, and cannot be cleared up inside the guest, which makes the guest's PMI handler very confused. Note, reusing global_ovf_ctrl_mask as global_status_mask will be broken if KVM supports higher versions of Intel arch pmu. Signed-off-by: Like Xu <likexu@xxxxxxxxxxx> --- arch/x86/kvm/vmx/pmu_intel.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 1f9c3e916a21..343b3182b7f4 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -399,7 +399,11 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) reprogram_fixed_counters(pmu, data); break; case MSR_CORE_PERF_GLOBAL_STATUS: - if (!msr_info->host_initiated) + /* + * Caution, the assumption here is that some of the bits (such as + * ASCI, CTR_FREEZE, and LBR_FREEZE) are not yet supported by KVM. + */ + if (!msr_info->host_initiated || (data & pmu->global_ovf_ctrl_mask)) return 1; /* RO MSR */ pmu->global_status = data; -- 2.40.0
