Re: [RFC PATCH 3/7] x86/entry: Implement atomic-IST-entry

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On 06/04/2023 10:58 pm, Peter Zijlstra wrote:
> On Mon, Apr 03, 2023 at 10:06:01PM +0800, Lai Jiangshan wrote:
>> +/* Replicate the interrupted atomic-IST-entry's CLEAR_REGS macro. */
>> +static __always_inline void replicate_clear_regs(struct pt_regs *target)
>> +{
>> +	target->di  = 0;
>> +	target->si  = 0;
>> +	target->dx  = 0;
>> +	target->cx  = 0;
>> +	target->ax  = 0;
>> +	target->r8  = 0;
>> +	target->r9  = 0;
>> +	target->r10 = 0;
>> +	target->r11 = 0;
>> +	target->bx  = 0;
>> +	target->bp  = 0;
>> +	target->r12 = 0;
>> +	target->r13 = 0;
>> +	target->r14 = 0;
>> +	target->r15 = 0;
>> +}
> I think there's compilers smart enough to see through your attempts at
> avoiding mem{set,cpy}() there

Indeed.  It took a little bit of convincing (needed 4 extra registers to
zero), but https://godbolt.org/z/7rvb8db66

Including Peter's other observation about speculation safety, you
basically can't have any C at all before passing IBRS/UNRET/whatever
else comes along in the future.

Otherwise, the compiler will make you wish you'd written it in asm the
first time around.

~Andrew



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