On Fri, 17 Mar 2023 15:11:35 +0100
Thomas Huth <thuth@xxxxxxxxxx> wrote:
> On 17/03/2023 15.09, Thomas Huth wrote:
> > On 15/03/2023 16.54, Nina Schoetterl-Glausch wrote:
> >> The EXECUTE instruction executes the instruction at the given target
> >> address. This address must be halfword aligned, otherwise a
> >> specification exception occurs.
> >> Add a test for this.
> >>
> >> Signed-off-by: Nina Schoetterl-Glausch <nsg@xxxxxxxxxxxxx>
> >> ---
> >> s390x/spec_ex.c | 25 +++++++++++++++++++++++++
> >> 1 file changed, 25 insertions(+)
> >>
> >> diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c
> >> index 83b8c58e..5fa05dba 100644
> >> --- a/s390x/spec_ex.c
> >> +++ b/s390x/spec_ex.c
> >> @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void)
> >> return 0;
> >> }
> >> +static int odd_ex_target(void)
> >> +{
> >> + uint64_t pre_target_addr;
> >> + int to = 0, from = 0x0dd;
> >> +
> >> + asm volatile ( ".pushsection .text.ex_odd\n"
> >> + " .balign 2\n"
> >> + "pre_odd_ex_target:\n"
> >> + " . = . + 1\n"
> >> + " lr %[to],%[from]\n"
> >> + " .popsection\n"
> >> +
> >> + " larl %[pre_target_addr],pre_odd_ex_target\n"
> >> + " ex 0,1(%[pre_target_addr])\n"
> >> + : [pre_target_addr] "=&a" (pre_target_addr),
> >> + [to] "+d" (to)
> >> + : [from] "d" (from)
> >> + );
> >> +
> >> + assert((pre_target_addr + 1) & 1);
> >> + report(to != from, "did not perform ex with odd target");
> >> + return 0;
> >> +}
> >
> > Can this be triggered with KVM, or is this just a test for TCG?
>
> With "triggered" I mean: Can this cause an interception in KVM?
AFAIK no, but KVM and TCG are not the only things we might want to test.
we are aware of the TCG tests, and we would like to also keep the KVM
unit tests.
>
> Thomas
>
