On Tue, Dec 20, 2022 at 10:07:57PM +0800, Robert Hoo wrote: > On Mon, 2022-12-19 at 17:45 +0800, Yuan Yao wrote: > > On Fri, Dec 09, 2022 at 12:45:54PM +0800, Robert Hoo wrote: > > > Define kvm_untagged_addr() per LAM feature spec: Address high bits > > > are sign > > > extended, from highest effective address bit. > > > Note that LAM_U48 and LA57 has some effective bits overlap. This > > > patch > > > gives a WARN() on that case. > > > > > > Now the only applicable possible case that addresses passed down > > > from VM > > > with LAM bits is those for MPX MSRs. > > > > How about the instruction emulation case ? e.g. KVM on behalf of CPU > > to do linear address accessing ? In this case the kvm_untagged_addr() > > should also be used to mask out the linear address, otherwise > > unexpected > > #GP(or other exception) will be injected into guest. > > > > Please see all callers of __is_canonical_address() > > > Emm, I take a look at the callers, looks like they're segment registers > and MSRs. Per spec (ISE 10.4): processors that support LAM continue to __linearize() is using __is_canonical_address() for 64 bit mode, and this is the code path for memory reading/writing emulation, what will happen if a LAM enabled guest appiled metadata to the address and KVM emulates the memory accessing for it ? > require the addresses written to control registers or MSRs be legacy > canonical. So, like the handling on your last commented point on this > patch, such situation needs no changes, i.e. legacy canonical still > applied. >
