From: Like Xu <likexu@xxxxxxxxxxx> When the guest uses topdown (the fixed counter 3 and perf_metrics msr), the sharing rule on the PERF_METRICS bit on the GLOBAL_CTRL msr does not change, that is, it should be updated synchronously with the fixed counter 3. Considering that guest topdown feature has just been enabled, this is not a strictly bug fix. Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx> Cc: linux-perf-users@xxxxxxxxxxxxxxx Signed-off-by: Like Xu <likexu@xxxxxxxxxxx> --- arch/x86/events/intel/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 1b92bf05fd65..e7897fd9f7ab 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -2436,6 +2436,8 @@ static void intel_pmu_disable_fixed(struct perf_event *event) */ if (*(u64 *)cpuc->active_mask & INTEL_PMC_OTHER_TOPDOWN_BITS(idx)) return; + + intel_clear_masks(event, GLOBAL_CTRL_EN_PERF_METRICS); idx = INTEL_PMC_IDX_FIXED_SLOTS; } @@ -2729,6 +2731,7 @@ static void intel_pmu_enable_fixed(struct perf_event *event) if (*(u64 *)cpuc->active_mask & INTEL_PMC_OTHER_TOPDOWN_BITS(idx)) return; + intel_set_masks(event, GLOBAL_CTRL_EN_PERF_METRICS); idx = INTEL_PMC_IDX_FIXED_SLOTS; } -- 2.38.2
