From: Like Xu <likexu@xxxxxxxxxxx>
Intel Sapphire Rapids server has 8 metrics events, while the Intel Ice Lake
only supports 4 metrics events. The available number of the Topdown
metrics are model specific without architecture hint.
To support guest Topdown metrics, KVM may only rely on the cpu model
to emulate the correct number of metrics event on the platforms. It would
be nice to have the perf core tell KVM the available number of Topdown
metrics, just like x86_pmu.num_counters.
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: linux-perf-users@xxxxxxxxxxxxxxx
Signed-off-by: Like Xu <likexu@xxxxxxxxxxx>
---
arch/x86/events/core.c | 1 +
arch/x86/include/asm/perf_event.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index b30b8bbcd1e2..d0d84c7a6876 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -3006,6 +3006,7 @@ void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
* which available for all cores.
*/
cap->num_counters_gp = x86_pmu.num_counters;
+ cap->num_topdown_events = x86_pmu.num_topdown_events;
cap->num_counters_fixed = x86_pmu.num_counters_fixed;
cap->bit_width_gp = x86_pmu.cntval_bits;
cap->bit_width_fixed = x86_pmu.cntval_bits;
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 5d0f6891ae61..3e263d291595 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -219,6 +219,7 @@ struct x86_pmu_capability {
int version;
int num_counters_gp;
int num_counters_fixed;
+ int num_topdown_events;
int bit_width_gp;
int bit_width_fixed;
unsigned int events_mask;
--
2.38.2
