On 2022/8/23 23:40, Sean Christopherson wrote:
On Tue, Aug 23, 2022, Binbin Wu wrote:
On 2022/8/8 6:01, isaku.yamahata@xxxxxxxxx wrote:
+static __always_inline void tdvps_vmcs_check(u32 field, u8 bits)
+{
+ BUILD_BUG_ON_MSG(__builtin_constant_p(field) && (field) & 0x1,
+ "Read/Write to TD VMCS *_HIGH fields not supported");
+
+ BUILD_BUG_ON(bits != 16 && bits != 32 && bits != 64);
+
+ BUILD_BUG_ON_MSG(bits != 64 && __builtin_constant_p(field) &&
+ (((field) & 0x6000) == 0x2000 ||
+ ((field) & 0x6000) == 0x6000),
+ "Invalid TD VMCS access for 64-bit field");
if bits is 64 here, "bits != 64" is false, how could this check for "Invalid
TD VMCS access for 64-bit field"?
Bits 14:13 of the encoding, which is extracted by "(field) & 0x6000", encodes the
width of the VMCS field. Bit 0 of the encoding, "(field) & 0x1" above, is a modifier
that is only relevant when operating in 32-bit mode, and is disallowed because TDX is
64-bit only.
This yields four possibilities for TDX:
(field) & 0x6000) == 0x0000 : 16-bit field
(field) & 0x6000) == 0x2000 : 64-bit field
(field) & 0x6000) == 0x4000 : 32-bit field
(field) & 0x6000) == 0x6000 : 64-bit field (technically "natural width", but
effectively 64-bit because TDX is
64-bit only)
The assertion is that if the encoding indicates a 64-bit field (0x2000 or 0x6000),
then the number of bits KVM is accessing must be '64'. The below assertions do
the same thing for 32-bit and 16-bit fields.
Thanks for explanation, it is crystal clear to me now. :)
+ BUILD_BUG_ON_MSG(bits != 32 && __builtin_constant_p(field) &&
+ ((field) & 0x6000) == 0x4000,
+ "Invalid TD VMCS access for 32-bit field");
ditto
+ BUILD_BUG_ON_MSG(bits != 16 && __builtin_constant_p(field) &&
+ ((field) & 0x6000) == 0x0000,
+ "Invalid TD VMCS access for 16-bit field");
ditto
