On Thu, Aug 25, 2022, Xiaoyao Li wrote:
> KVM supports PT_MODE_HOST_GUEST mode for Intel PT that host and guest
> have separate Intel PT configurations and work independently. In that
> mdoe, KVM needs to context switch all the Intel PT configurations
> between host and guest on VM-entry and VM-exit.
>
> Before VM-entry, if Intel PT is enabled on host, KVM needs to disable it
> first so as to context switch the PT configurations. After VM exit, KVM
> needs to re-enable Intel PT for host. Currently, KVM achieves it by
> manually toggle MSR_IA32_RTIT_CTL.TRACEEN bit to en/dis-able Intel PT.
>
> However, PT PMI can be delivered after MSR_IA32_RTIT_CTL.TRACEEN bit is
> cleared. PT PMI handler changes PT MSRs and re-enable PT, that leads to
> 1) VM-entry failure of guest 2) KVM stores stale value of PT MSRs.
>
> To solve the problems, expose two interfaces for KVM to stop and
> resume the PT tracing.
>
> Signed-off-by: Xiaoyao Li <xiaoyao.li@xxxxxxxxx>
> ---
> arch/x86/events/intel/pt.c | 11 ++++++++++-
> arch/x86/include/asm/intel_pt.h | 6 ++++--
> arch/x86/kernel/crash.c | 4 ++--
> 3 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c
> index 82ef87e9a897..55fc02036ff1 100644
> --- a/arch/x86/events/intel/pt.c
> +++ b/arch/x86/events/intel/pt.c
> @@ -1730,13 +1730,22 @@ static int pt_event_init(struct perf_event *event)
> return 0;
> }
>
> -void cpu_emergency_stop_pt(void)
> +void intel_pt_stop(void)
> {
> struct pt *pt = this_cpu_ptr(&pt_ctx);
>
> if (pt->handle.event)
> pt_event_stop(pt->handle.event, PERF_EF_UPDATE);
> }
> +EXPORT_SYMBOL_GPL(intel_pt_stop);
> +
> +void intel_pt_resume(void) {
Curly brace goes on its own line.
> + struct pt *pt = this_cpu_ptr(&pt_ctx);
> +
> + if (pt->handle.event)
> + pt_event_start(pt->handle.event, 0);
> +}
> +EXPORT_SYMBOL_GPL(intel_pt_resume);
>
> int is_intel_pt_event(struct perf_event *event)
> {
