KVM supports PT_MODE_HOST_GUEST mode for Intel PT that host and guest
have separate Intel PT configurations and work independently. In that
mdoe, KVM needs to context switch all the Intel PT configurations
between host and guest on VM-entry and VM-exit.
Before VM-entry, if Intel PT is enabled on host, KVM needs to disable it
first so as to context switch the PT configurations. After VM exit, KVM
needs to re-enable Intel PT for host. Currently, KVM achieves it by
manually toggle MSR_IA32_RTIT_CTL.TRACEEN bit to en/dis-able Intel PT.
However, PT PMI can be delivered after MSR_IA32_RTIT_CTL.TRACEEN bit is
cleared. PT PMI handler changes PT MSRs and re-enable PT, that leads to
1) VM-entry failure of guest 2) KVM stores stale value of PT MSRs.
To solve the problems, expose two interfaces for KVM to stop and
resume the PT tracing.
Signed-off-by: Xiaoyao Li <xiaoyao.li@xxxxxxxxx>
---
arch/x86/events/intel/pt.c | 11 ++++++++++-
arch/x86/include/asm/intel_pt.h | 6 ++++--
arch/x86/kernel/crash.c | 4 ++--
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c
index 82ef87e9a897..55fc02036ff1 100644
--- a/arch/x86/events/intel/pt.c
+++ b/arch/x86/events/intel/pt.c
@@ -1730,13 +1730,22 @@ static int pt_event_init(struct perf_event *event)
return 0;
}
-void cpu_emergency_stop_pt(void)
+void intel_pt_stop(void)
{
struct pt *pt = this_cpu_ptr(&pt_ctx);
if (pt->handle.event)
pt_event_stop(pt->handle.event, PERF_EF_UPDATE);
}
+EXPORT_SYMBOL_GPL(intel_pt_stop);
+
+void intel_pt_resume(void) {
+ struct pt *pt = this_cpu_ptr(&pt_ctx);
+
+ if (pt->handle.event)
+ pt_event_start(pt->handle.event, 0);
+}
+EXPORT_SYMBOL_GPL(intel_pt_resume);
int is_intel_pt_event(struct perf_event *event)
{
diff --git a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h
index c796e9bc98b6..fdfa4d31740c 100644
--- a/arch/x86/include/asm/intel_pt.h
+++ b/arch/x86/include/asm/intel_pt.h
@@ -27,12 +27,14 @@ enum pt_capabilities {
};
#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
-void cpu_emergency_stop_pt(void);
+void intel_pt_stop(void);
+void intel_pt_resume(void);
extern u32 intel_pt_validate_hw_cap(enum pt_capabilities cap);
extern u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities cap);
extern int is_intel_pt_event(struct perf_event *event);
#else
-static inline void cpu_emergency_stop_pt(void) {}
+static inline void intel_pt_stop(void) {}
+static inline void intel_pt_resume(void) {}
static inline u32 intel_pt_validate_hw_cap(enum pt_capabilities cap) { return 0; }
static inline u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities capability) { return 0; }
static inline int is_intel_pt_event(struct perf_event *event) { return 0; }
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index 9730c88530fc..2f2f72a209c0 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -93,7 +93,7 @@ static void kdump_nmi_callback(int cpu, struct pt_regs *regs)
/*
* Disable Intel PT to stop its logging
*/
- cpu_emergency_stop_pt();
+ intel_pt_stop();
disable_local_APIC();
}
@@ -158,7 +158,7 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
/*
* Disable Intel PT to stop its logging
*/
- cpu_emergency_stop_pt();
+ intel_pt_stop();
#ifdef CONFIG_X86_IO_APIC
/* Prevent crash_kexec() from deadlocking on ioapic_lock. */
--
2.27.0
