There are some tests that fail when running on bare metal (including a passthrough prototype). There are three issues with the tests. The first one is that there are some missing isb()'s between enabling event counting and the actual counting. This wasn't an issue on KVM as trapping on registers served as context synchronization events. The second issue is that some tests assume that registers reset to 0. And finally, the third issue is that overflowing the low counter of a chained event sets the overflow flag in PMVOS and some tests fail by checking for it not being set. I believe the third fix also requires a KVM change, but would like to double check with others first. The only reference I could find in the ARM ARM is the AArch64.IncrementEventCounter() pseudocode (DDI 0487H.a, J1.1.1 "aarch64/debug") that unconditionally sets the PMOVS bit on overflow. Ricardo Koller (3): arm: pmu: Add missing isb()'s after sys register writing arm: pmu: Reset the pmu registers before starting some tests arm: pmu: Remove checks for !overflow in chained counters tests arm/pmu.c | 34 +++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) -- 2.37.0.170.g444d1eabd0-goog
