On 6/10/2022 12:56 PM, Like Xu wrote:
On 10/6/2022 12:22 pm, Jim Mattson wrote:
On Thu, Jun 9, 2022 at 9:16 PM Jim Mattson <jmattson@xxxxxxxxxx> wrote:
On Thu, Jun 9, 2022 at 7:49 PM Like Xu <like.xu.linux@xxxxxxxxx> wrote:
RDPMC Intel Operation:
Actually, the key phrase is also present in the pseudocode you quoted:
MSCB = Most Significant Counter Bit (* Model-specific *)
IF (((CR4.PCE = 1) or (CPL = 0) or (CR0.PE = 0)) and (ECX indicates
a supported
counter))
...
The final conjunct in that condition is false under KVM when
!enable_pmu, because there are no supported counters.
Uh, I have lifted a stone and smashed my own feet.
Please move on with #GP expectation.
Thank you two!
