On Tue, 2022-06-07 at 19:22 +0000, Sean Christopherson wrote: > On Tue, Jun 07, 2022, Paolo Bonzini wrote: > > On 6/7/22 17:16, Maxim Levitsky wrote: > > > If the #SMI happens while the vCPU is in the interrupt shadow, > > > (after STI or MOV SS), > > > we must both clear it to avoid VM entry failure on VMX, > > > due to consistency check vs EFLAGS.IF which is cleared on SMM entries, > > > and restore it on RSM so that #SMI is transparent to the non SMM code. > > > > > > To support migration, reuse upper 4 bits of > > > 'kvm_vcpu_events.interrupt.shadow' to store the smm interrupt shadow. > > > > > > This was lightly tested with a linux guest and smm load script, > > > and a unit test will be soon developed to test this better. > > > > > > For discussion: there are other ways to fix this issue: > > > > > > 1. The SMM shadow can be stored in SMRAM at some unused > > > offset, this will allow to avoid changes to kvm_vcpu_ioctl_x86_set_vcpu_events > > > > Yes, that would be better (and would not require a new cap). > > At one point do we chalk up SMM emulation as a failed experiment and deprecate > support? There are most definitely more bugs lurking in KVM's handling of > save/restore across SMI+RSM. I also kind of agree that SMM was kind of a mistake but these days VMs with secure boot use it, so we can't stop supporting this. So do you also agree that I write the interrupt shadow to smram? Best regards, Maxim Levitsky > > > > 2. #SMI can instead be blocked while the interrupt shadow is active, > > > which might even be what the real CPU does, however since neither VMX > > > nor SVM support SMM window handling, this will involve single stepping > > > the guest like it is currently done on SVM for the NMI window in some cases. > > FWIW, blocking SMI in STI/MOVSS shadows is explicitly allowed by the Intel SDM. > IIRC, modern Intel CPUs block SMIs in MOVSS shadows but not STI shadows. >
