On 6/7/22 17:16, Maxim Levitsky wrote:
If the #SMI happens while the vCPU is in the interrupt shadow, (after STI or MOV SS), we must both clear it to avoid VM entry failure on VMX, due to consistency check vs EFLAGS.IF which is cleared on SMM entries, and restore it on RSM so that #SMI is transparent to the non SMM code. To support migration, reuse upper 4 bits of 'kvm_vcpu_events.interrupt.shadow' to store the smm interrupt shadow. This was lightly tested with a linux guest and smm load script, and a unit test will be soon developed to test this better. For discussion: there are other ways to fix this issue: 1. The SMM shadow can be stored in SMRAM at some unused offset, this will allow to avoid changes to kvm_vcpu_ioctl_x86_set_vcpu_events
Yes, that would be better (and would not require a new cap). Paolo
