On Fri, May 20, 2022, Jon Kohler wrote:
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 610355b9ccce..1c725d17d984 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -2057,20 +2057,32 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> return 1;
>
> vmx->spec_ctrl = data;
> - if (!data)
> +
> + /*
> + * Disable interception on the first non-zero write, unless the
> + * guest is hosted on an eIBRS system and setting only
The "unless guest is hosted on an eIBRS system" blurb is wrong and doesn't match
the code. Again, it's all about whether eIBRS is advertised to the guest. With
some other minor tweaking to wrangle the comment to 80 chars...
/*
* Disable interception on the first non-zero write, except if
* eIBRS is advertised to the guest and the guest is enabling
* _only_ IBRS. On eIBRS systems, kernels typically set IBRS
* once at boot and never touch it post-boot. All other bits,
* and IBRS on non-eIBRS systems, are often set on a per-task
* basis, i.e. change frequently, so the benefit of avoiding
* VM-exits during guest context switches outweighs the cost of
* RDMSR on every VM-Exit to save the guest's value.
*/
> + * SPEC_CTRL_IBRS, which is typically set once at boot and never
Uber nit, when it makes sense, avoid regurgitating the code verbatim, e.g. refer
to "setting SPEC_CTRL_IBRS" as "enabling IBRS". That little bit of abstraction
can sometimes help unfamiliar readers understand the effect of the code, whereas
copy+pasting bits of the code doesn't provide any additional context.
> + * touched again. All other bits are often set on a per-task
> + * basis, i.e. may change frequently, so the benefit of avoiding
> + * VM-exits during guest context switches outweighs the cost of
> + * RDMSR on every VM-Exit to save the guest's value.
> + */
> + if (!data ||
> + (data == SPEC_CTRL_IBRS &&
> + (vcpu->arch.arch_capabilities & ARCH_CAP_IBRS_ALL)))
Align the two halves of the logical-OR, i.e.
if (!data ||
(data == SPEC_CTRL_IBRS &&
(vcpu->arch.arch_capabilities & ARCH_CAP_IBRS_ALL)))
break;
