From: Wanpeng Li <wanpengli@xxxxxxxxxxx> The timer is disarmed when switching between TSC deadline and other modes, however, the pending timer is still in-flight, so let's accurately set everything to a disarmed state, this patch does it by clearing pending when canceling the timer. Fixes: 4427593258 (KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch) Signed-off-by: Wanpeng Li <wanpengli@xxxxxxxxxxx> --- v1 -> v2: * clear pending in cancel_apic_timer arch/x86/kvm/lapic.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 66b0eb0bda94..6268880c8eed 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1548,6 +1548,7 @@ static void cancel_apic_timer(struct kvm_lapic *apic) if (apic->lapic_timer.hv_timer_in_use) cancel_hv_timer(apic); preempt_enable(); + atomic_set(&apic->lapic_timer.pending, 0); } static void apic_update_lvtt(struct kvm_lapic *apic) -- 2.25.1
