On Mon, Dec 21, 2009 at 01:46:36AM -0500, john cooper wrote:
> This adds definitions for contemporary processors
> which may be selected via -cpu <model>, as an
> alternative to the existing use of -cpu qemu64
> augmented with a series of feature flags.
>
> The primary motivation was determination of a
> least common denominator within a given processor
> class for simplification of guest migration. It
> is still possible to modify an arbitrary model via
> additional feature flags however the goal here was
> to make doing so unnecessary in typical usage. The
> other consideration was providing models names
> reflective of current processors. Both AMD and
> Intel have reviewed the models in terms of balancing
> generality of migration vs. excessive feature
> downgrade relative to released silicon.
>
> A cpu feature 'check' option is also added which
> warns when feature flags (either implicit in a cpu
> model or explicit on the command line) would have
> otherwise been quietly disabled for a guest.
>
> This patch was tested relative to qemu-kvm.git.
>
> Signed-off-by: john cooper <john.cooper@xxxxxxxxxx>
> ---
>
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 9a50da6..a706cae 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -44,7 +44,7 @@ static const char *feature_name[] = {
> static const char *ext_feature_name[] = {
> "pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est",
> "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
> - NULL, NULL, "dca", NULL, NULL, "x2apic", NULL, "popcnt",
> + NULL, NULL, "dca", "sse4.1", "sse4.2", "x2apic", NULL, "popcnt",
> NULL, NULL, NULL, NULL, NULL, NULL, NULL, "hypervisor",
> };
Separate patch?
> static const char *ext2_feature_name[] = {
> @@ -60,6 +60,18 @@ static const char *ext3_feature_name[] = {
> NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> };
>
> +/* collects per-function cpuid data
> + */
> +typedef struct model_features_t {
> + uint32_t *guest_feat;
> + uint32_t *host_feat;
> + uint32_t check_feat;
> + const char **flag_names;
> + uint32_t cpuid;
> + } model_features_t;
> +
> +int check_cpuid = 0;
> +
> static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
> uint32_t *ext_features,
> uint32_t *ext2_features,
> @@ -171,6 +183,139 @@ static x86_def_t x86_defs[] = {
> .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
> },
> {
> + .name = "Merom",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6, /* P6 */
> + .model = 2,
> + .stepping = 3,
> + .features = PPRO_FEATURES |
> + /* these features are needed for Win64 and aren't fully implemented */
> + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
> + /* this feature is needed for Solaris and isn't fully implemented */
> + CPUID_PSE36,
> + .ext_features = CPUID_EXT_SSE3, /* from qemu64 */
> + .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_SVM, /* from qemu64 */
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Merom Core 2",
> + },
> + {
> + .name = "Penryn",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6, /* P6 */
> + .model = 2,
> + .stepping = 3,
> + .features = PPRO_FEATURES |
> + /* these features are needed for Win64 and aren't fully implemented */
> + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
> + /* this feature is needed for Solaris and isn't fully implemented */
> + CPUID_PSE36,
> + .ext_features = CPUID_EXT_SSE3 |
> + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE41,
> + .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_SVM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Penryn Core 2",
> + },
> + {
> + .name = "Nehalem",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6, /* P6 */
> + .model = 2,
> + .stepping = 3,
> + .features = PPRO_FEATURES |
> + /* these features are needed for Win64 and aren't fully implemented */
> + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
> + /* this feature is needed for Solaris and isn't fully implemented */
> + CPUID_PSE36,
> + .ext_features = CPUID_EXT_SSE3 |
> + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE41 |
> + CPUID_EXT_SSE42 | CPUID_EXT_POPCNT,
> + .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_SVM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Nehalem Core i7",
> + },
> + {
> + .name = "Opteron_G1",
> + .level = 5,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 15,
> + .model = 6,
> + .stepping = 1,
> + .features = PPRO_FEATURES |
> + /* these features are needed for Win64 and aren't fully implemented */
> + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
> + /* this feature is needed for Solaris and isn't fully implemented */
> + CPUID_PSE36,
> + .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
> + .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_SVM,
> + .xlevel = 0x80000008,
> + .model_id = "AMD Opteron G1",
> + },
> + {
> + .name = "Opteron_G2",
> + .level = 5,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
Silly question: why a CPU named "Opteron_G2" uses intel vendor id's?
> +static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
> +{
> + int i;
> +
> + for (i = 0; i < 32; ++i)
> + if (1 << i & mask) {
> + fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
> + " flag '%s' [0x%08x]\n",
> + f->cpuid >> 16, f->cpuid & 0xffff,
> + f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
> + break;
> + }
> + return 0;
> +}
Deserves a separate patch, too.
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