On Tue, 11 Jan 2022 22:16:01 +0000, Jing Zhang <jingzhangos@xxxxxxxxxx> wrote: > > On Tue, Jan 11, 2022 at 2:30 AM Marc Zyngier <maz@xxxxxxxxxx> wrote: > > > > On Mon, 10 Jan 2022 21:04:41 +0000, > > Jing Zhang <jingzhangos@xxxxxxxxxx> wrote: > > > > > > For ARM64, if no vgic is setup before the dirty log perf test, the > > > userspace irqchip would be used, which would affect the dirty log perf > > > test result. > > > > Doesn't it affect *all* performance tests? How much does this change > > contributes to the performance numbers you give in the cover letter? > > > This bottleneck showed up after adding the fast path patch. I didn't > try other performance tests with this, but I think it is a good idea > to add a vgic setup for all performance tests. I can post another > patch later to make it available for all performance tests after > finishing this one and verifying all other performance tests. > Below is the test result without adding the vgic setup. It shows > 20~30% improvement for the different number of vCPUs. > +-------+------------------------+ > | #vCPU | dirty memory time (ms) | > +-------+------------------------+ > | 1 | 965 | > +-------+------------------------+ > | 2 | 1006 | > +-------+------------------------+ > | 4 | 1128 | > +-------+------------------------+ > | 8 | 2005 | > +-------+------------------------+ > | 16 | 3903 | > +-------+------------------------+ > | 32 | 7595 | > +-------+------------------------+ > | 64 | 15783 | > +-------+------------------------+ So please use these numbers in your cover letter when you repost your series, as the improvement you'd observe on actual workloads is likely to be less than what you claim due to this change in the test itself (in other words, if you are going to benchamark something, don't change the benchmark halfway). M. -- Without deviation from the norm, progress is not possible.