Re: [PATCH 0/2] kvm: x86: Fix PMU virtualization for some basic events

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Hi Jim,

On 16/11/2021 1:51 am, Jim Mattson wrote:
On Sun, Nov 14, 2021 at 7:43 PM Like Xu <like.xu.linux@xxxxxxxxx> wrote:

On 13/11/2021 7:52 am, Jim Mattson wrote:
Google Cloud has a customer that needs accurate virtualization of two
architected PMU events on Intel hardware: "instructions retired" and
"branch instructions retired." The existing PMU virtualization code
fails to account for instructions that are emulated by kvm.

Does this customer need to set force_emulation_prefix=Y ?

No. That module parameter does make it easier to write the test, though.

It's possible that the L0 hypervisor will never emulate a branch
instruction for this use case. However, since the code being
instrumented is potential malware, one can't make the usual
assumptions about "well-behaved" code. For example, it is quite
possible that the code in question deliberately runs with the TLBs and
in-memory page tables out of sync. Therefore, it's hard to prove that
the "branch instructions retired" patch isn't needed.

Thanks for your input.


Is this "accurate statistics" capability fatal to the use case ?

Yes, that is my understanding.

Uh, looks like it's right time to do this.



Accurately virtualizing all PMU events for all microarchitectures is a
herculean task, but there are only 8 architected events, so maybe we
can at least try to get those right.

I assume you mean the architectural events "Instruction Retired"
and "Branch Instruction Retired" defined by the Intel CPUID
since it looks we don't have a similar concept on AMD.

Yes.

This patch set opens Pandora's Box, especially when we have
the real accurate Guest PEBS facility, and things get even
more complicated for just some PMU corner use cases.

KVM's PMU virtualization is rife with bugs, but this patch set doesn't
make that worse. It actually makes things better by fixing two of
those bugs.

Yes, I can't agree more.



Eric Hankland wrote this code originally, but his plate is full, so
I've volunteered to shepherd the changes through upstream acceptance.

Does Eric have more code to implement
accurate virtualization on the following events ?

No. We only offer PMU virtualization to one customer, and that
customer is only interested in the two events addressed by this patch
set.

Fine to me and I'll start looking at the code.


"UnHalted Core Cycles"
"UnHalted Reference Cycles"
"LLC Reference"
"LLC Misses"
"Branch Misses Retired"
"Topdown Slots" (unimplemented)

Obviously, it's difficult, even absurd, to emulate these.

Sorry; I should not have mentioned the eight architected events. It's
not entirely clear what some of these events mean in a virtual
environment. Let's just stick to the two events covered by this patch
set.

Thanks for the clarification.


Jim Mattson (2):
    KVM: x86: Update vPMCs when retiring instructions
    KVM: x86: Update vPMCs when retiring branch instructions

   arch/x86/kvm/emulate.c     | 57 +++++++++++++++++++++-----------------
   arch/x86/kvm/kvm_emulate.h |  1 +
   arch/x86/kvm/pmu.c         | 31 +++++++++++++++++++++
   arch/x86/kvm/pmu.h         |  1 +
   arch/x86/kvm/vmx/nested.c  |  6 +++-
   arch/x86/kvm/x86.c         |  5 ++++
   6 files changed, 75 insertions(+), 26 deletions(-)




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