On Mon, 2021-11-15 at 19:49 +0100, Paolo Bonzini wrote: > On 11/15/21 17:50, David Woodhouse wrote: > > + asm volatile("1:\t" LOCK_PREFIX "orq %0, %1\n" > > + "\tnotq %0\n" > > + "\t" LOCK_PREFIX "andq %0, %2\n" > > + "2:\n" > > + "\t.section .fixup,\"ax\"\n" > > + "3:\tjmp\t2b\n" > > + "\t.previous\n" > > + _ASM_EXTABLE_UA(1b, 3b) > > + : "=r" (evtchn_pending_sel) > > + : "m" (vi->evtchn_pending_sel), > > + "m" (v->arch.xen.evtchn_pending_sel), > > These need to be "+m", I think? > > And same for st->preempted actually Ack. Although as noted, I think I'll switch to a gfn_to_pfn_cache for the vcpu_info too, once the dust has settled on the implementation.
Attachment:
smime.p7s
Description: S/MIME cryptographic signature