In KVM/arm64, values of ID registers for a guest are mostly same as
its host's values except for bits for feature that KVM doesn't support
and for opt-in features that userspace didn't configure. Userspace
can use KVM_SET_ONE_REG to a set ID register value, but it fails
if userspace attempts to modify the register value.
This patch series adds support to allow userspace to modify a value of
ID registers (as long as KVM can support features that are indicated
in the registers) so userspace can have more control of configuring
and unconfiguring features for guests.
The patch series affects both VHE or non-VHE including protected VMs
for now but should be changed not to affect for protected VMs, which
will have a different way of configuring ID registers [1] based on
its different requirements.
There was a patch series that tried to achieve the same thing [2].
A few snippets of codes in this series were inspired by or came from [2].
The initial value of ID registers for a vCPU will be the host's value
with bits cleared for unsupported features and for opt-in features that
were not configured. So, the initial value userspace can see (via
KVM_GET_ONE_REG) is the upper limit that can be set for the register.
Any requests to change the value that conflicts with opt-in features'
configuration will fail.
When a guest tries to use a CPU feature that is not exposed to the guest,
trapping it (to emulate a real CPU's behavior) would generally be a
desirable behavior (when it's possible with no or little side effects).
The later patches in the series add codes for this. Only features that
can be trapped independently will be trapped by this series though.
The series is based on v5.15 with the patch series [3] applied.
v2:
- Remove unnecessary line breaks. [Andrew]
- Use @params for comments. [Andrew]
- Move arm64_check_features to arch/arm64/kvm/sys_regs.c and
change that KVM specific feature check function. [Andrew]
- Remove unnecessary raz handling from __set_id_reg. [Andrew]
- Remove sys_val field from the initial id_reg_info and add it
in the later patch. [Andrew]
- Call id_reg->init() from id_reg_info_init(). [Andrew]
- Fix cpuid_feature_cap_perfmon_field() to convert 0xf to 0x0
(and use it in the following patches).
- Change kvm_vcpu_first_run_init to set has_run_once to false
when kvm_id_regs_consistency_check() fails.
- Add a patch to introduce id_reg_info for ID_AA64MMFR0_EL1,
which requires special validity checking for TGran*_2 fields.
- Add patches to introduce id_reg_info for ID_DFR1_EL1 and
ID_MMFR0_EL1, which are required due to arm64_check_features
implementation change.
- Add a new argument, which is a pointer to id_reg_info, for
id_reg_info's validate()
v1: https://lore.kernel.org/all/20211012043535.500493-1-reijiw@xxxxxxxxxx/
[1] https://lore.kernel.org/kvmarm/20211010145636.1950948-1-tabba@xxxxxxxxxx/
[2] https://lore.kernel.org/kvm/20201102033422.657391-1-liangpeng10@xxxxxxxxxx/
[3] https://lore.kernel.org/kvmarm/20211007233439.1826892-1-rananta@xxxxxxxxxx/
Reiji Watanabe (28):
KVM: arm64: Add has_reset_once flag for vcpu
KVM: arm64: Save ID registers' sanitized value per vCPU
KVM: arm64: Introduce struct id_reg_info
KVM: arm64: Keep consistency of ID registers between vCPUs
KVM: arm64: Make ID_AA64PFR0_EL1 writable
KVM: arm64: Make ID_AA64PFR1_EL1 writable
KVM: arm64: Make ID_AA64ISAR0_EL1 writable
KVM: arm64: Make ID_AA64ISAR1_EL1 writable
KVM: arm64: Make ID_AA64MMFR0_EL1 writable
KVM: arm64: Hide IMPLEMENTATION DEFINED PMU support for the guest
KVM: arm64: Make ID_AA64DFR0_EL1 writable
KVM: arm64: Make ID_DFR0_EL1 writable
KVM: arm64: Make ID_DFR1_EL1 writable
KVM: arm64: Make ID_MMFR0_EL1 writable
KVM: arm64: Make MVFR1_EL1 writable
KVM: arm64: Make ID registers without id_reg_info writable
KVM: arm64: Add consistency checking for frac fields of ID registers
KVM: arm64: Introduce KVM_CAP_ARM_ID_REG_WRITABLE capability
KVM: arm64: Use vcpu->arch cptr_el2 to track value of cptr_el2 for VHE
KVM: arm64: Use vcpu->arch.mdcr_el2 to track value of mdcr_el2
KVM: arm64: Introduce framework to trap disabled features
KVM: arm64: Trap disabled features of ID_AA64PFR0_EL1
KVM: arm64: Trap disabled features of ID_AA64PFR1_EL1
KVM: arm64: Trap disabled features of ID_AA64DFR0_EL1
KVM: arm64: Trap disabled features of ID_AA64MMFR1_EL1
KVM: arm64: Trap disabled features of ID_AA64ISAR1_EL1
KVM: arm64: Activate trapping of disabled CPU features for the guest
KVM: arm64: selftests: Introduce id_reg_test
Documentation/virt/kvm/api.rst | 8 +
arch/arm64/include/asm/cpufeature.h | 2 +-
arch/arm64/include/asm/kvm_arm.h | 32 +
arch/arm64/include/asm/kvm_host.h | 18 +-
arch/arm64/include/asm/sysreg.h | 2 +
arch/arm64/kvm/arm.c | 31 +-
arch/arm64/kvm/debug.c | 13 +-
arch/arm64/kvm/hyp/vhe/switch.c | 14 +-
arch/arm64/kvm/reset.c | 4 +
arch/arm64/kvm/sys_regs.c | 1236 ++++++++++++++--
include/uapi/linux/kvm.h | 1 +
tools/arch/arm64/include/asm/sysreg.h | 1 +
tools/testing/selftests/kvm/.gitignore | 1 +
tools/testing/selftests/kvm/Makefile | 1 +
.../selftests/kvm/aarch64/id_reg_test.c | 1296 +++++++++++++++++
15 files changed, 2508 insertions(+), 152 deletions(-)
create mode 100644 tools/testing/selftests/kvm/aarch64/id_reg_test.c
--
2.33.1.1089.g2158813163f-goog
